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Instruction Set Processor

   Also found in: Acronyms 0.04 sec.
(language)Instruction Set Processor - (ISP) A family of languages for describing the instruction sets of computers.

["Computer Structures: Readings and Examples", D.P. Siewiorek et al, McGraw-Hill 1982].


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Leveraging its innovative ISiS(TM) (Integrated Silicon & Software) Platform and proprietary Matched Instruction Set Processor (MISP(TM)) architecture, Ellipsis delivers complete, fully optimized solutions with the lowest gate count, dramatically reduced power consumption, extended operational range and superior performance.
Ellipsis Optimizes WLAN Technology for Mobile Devices; SoC-Embeddable ... by Business Wire
Leveraging its innovative ISiS(TM) Platform design and proprietary Matched Instruction Set Processor (MISP(TM)) architecture, Ellipsis is delivering complete, fully optimized silicon solutions with the lowest gate count, dramatically reduced power consumption, extended operational range and superior performance.
Ellipsis Digital Systems Offers Low Cost Alternative to WLAN ASICs; ... by Business Wire
This impetus will drive the industry away from standard, fixed instruction set processors and traditional sea-of-gates ASIC approaches.
Tensilica Says Industry On Road to a ``Sea-of-Processors'' As SOC and ... by Business Wire
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